XC3S400-4FT256C Xilinx Inc, XC3S400-4FT256C Datasheet - Page 78
XC3S400-4FT256C
Manufacturer Part Number
XC3S400-4FT256C
Description
SEMI CONDUCTOR
Manufacturer
Xilinx Inc
Datasheet
1.XC3S400-4FT256C.pdf
(208 pages)
Specifications of XC3S400-4FT256C
Case
BGA
Dc
04+
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Spartan-3 FPGA Family: DC and Switching Characteristics
The capacitive load (C
and GND. The Output timing for all standards, as published
in the speed files and the data sheet, is always based on a
C
are used for all measurements. Any delay that the test fix-
ture might contribute to test measurements is subtracted
from those measurements to produce the final timing num-
bers as published in the speed files and data sheet.
Using IBIS Models to Simulate Load
Conditions in Application
IBIS Models permit the most accurate prediction of timing
delays for a given application. The parameters found in the
IBIS model (V
with the parameters used in
not confuse V
model with V
table. A fourth parameter, C
parameters describe all relevant output test conditions. IBIS
78
L
value of zero. High-impedance probes (less than 1 pF)
REF
REF
REF
, R
(the input-switching threshold) from the
(the termination voltage) from the IBIS
REF
L
) is connected between the output
, and V
REF
Table
, is always zero. The four
MEAS
47, V
) correspond directly
T
, R
T
, and V
M
www.xilinx.com
. Do
models are found in the Xilinx development software as well
as at the following link.
Simulate delays for a given application according to its spe-
cific load conditions as follows:
1. Simulate the desired signal standard with the output
2. Record the time to V
3. Simulate the same signal standard with the output
4. Record the time to V
5. Compare the results of steps 2 and 4. The increase (or
http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp
driver connected to the test setup shown in
Use parameter values V
C
driver connected to the PCB trace with load. Use the
appropriate IBIS model (including V
and V
load.
decrease) in delay should be added to (or subtracted
from) the appropriate Output standard adjustment
REF
is zero.
MEAS
values) or capacitive value to represent the
M
MEAS
.
T
, R
.
T
DS099-3 (v2.2) May 25, 2007
, and V
Product Specification
REF
M
from
, R
REF
Table
Figure
, C
REF
47.
33.
,
R
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