XC3S400-4FT256C Xilinx Inc, XC3S400-4FT256C Datasheet - Page 120
XC3S400-4FT256C
Manufacturer Part Number
XC3S400-4FT256C
Description
SEMI CONDUCTOR
Manufacturer
Xilinx Inc
Datasheet
1.XC3S400-4FT256C.pdf
(208 pages)
Specifications of XC3S400-4FT256C
Case
BGA
Dc
04+
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Spartan-3 FPGA Family: Pinout Descriptions
Power, Ground, and I/O by Package
Each package has three separate voltage supply
inputs—VCCINT, VCCAUX, and VCCO—and a common
ground return, GND. The numbers of pins dedicated to
these functions varies by package, as shown in
Table 83: Power and Ground Supply Pins by Package
120
Package
FG1156
VQ100
PQ208
CP132
TQ144
FG320
FG456
FG676
FG900
FT256
VCCINT
12
12
20
32
40
4
4
4
4
8
VCCAUX
16
24
32
4
4
4
8
8
8
8
VCCO
104
12
12
12
24
28
40
64
80
8
Table
GND
120
184
10
12
16
28
32
40
52
76
www.xilinx.com
83.
A majority of package pins are user-defined I/O pins. How-
ever, the numbers and characteristics of these I/O depends
on the device type and the package in which it is available,
as shown in
ber of single-ended I/O pins available, assuming that all
I/O-, DUAL-, DCI-, VREF-, and GCLK-type pins are used as
general-purpose I/O. Likewise, the table shows the maxi-
mum number of differential pin-pairs available on the pack-
age. Finally, the table shows how the total maximum user
I/Os are distributed by pin type, including the number of
unconnected—i.e., N.C.—pins on the device.
Table
84. The table shows the maximum num-
DS099-4 (v2.2) May 25, 2007
Product Specification
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