XC5VLX50T-1FFG665C Xilinx Inc, XC5VLX50T-1FFG665C Datasheet - Page 13

FPGA, VIRTEX-5 LXT, 50K, 665FCBGA

XC5VLX50T-1FFG665C

Manufacturer Part Number
XC5VLX50T-1FFG665C
Description
FPGA, VIRTEX-5 LXT, 50K, 665FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr

Specifications of XC5VLX50T-1FFG665C

No. Of Logic Blocks
7200
Family Type
Virtex-5
No. Of Speed Grades
1
Total Ram Bits
2211840
No. Of I/o's
360
Clock Management
DCM, PLL
I/o Supply Voltage
3.3V
Operating Frequency Max
550MHz
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
665-BBGA, FCBGA
Core Supply Voltage Range
1V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1565
GTP_DUAL Tile Specifications
GTP_DUAL Tile DC Characteristics
Table 24: Absolute Maximum Ratings for GTP_DUAL Tiles
Symbol
MGTAVCCPLL
Analog supply voltage for the GTP_DUAL shared PLL relative to GND
MGTAVTTTX
Analog supply voltage for the GTP_DUAL transmitters relative to GND
MGTAVTTRX
Analog supply voltage for the GTP_DUAL receivers relative to GND
MGTAVCC
Analog supply voltage for the GTP_DUAL common circuits relative to GND
MGTAVTTRXC
Analog supply voltage for the resistor calibration circuit of the GTP_DUAL
column
Notes:
1.
Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.
Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.
Table 25: Recommended Operating Conditions for GTP_DUAL Tiles
Symbol
(1)
MGTAVCCPLL
Analog supply voltage for the GTP_DUAL shared PLL relative to GND
(1)
MGTAVTTTX
Analog supply voltage for the GTP_DUAL transmitters relative to GND
(1)
MGTAVTTRX
Analog supply voltage for the GTP_DUAL receivers relative to GND
(1)
MGTAVCC
Analog supply voltage for the GTP_DUAL common circuits relative to GND
(1)
MGTAVTTRXC
Analog supply voltage for the resistor calibration circuit of the GTP_DUAL
column
Notes:
1.
Each voltage listed requires the filter circuit described in UG196: Virtex-5 FPGA RocketIO GTP Transceiver User Guide.
2.
Voltages are specified for the temperature range of T
Table 26: DC Characteristics Over Recommended Operating Conditions for GTP_DUAL Tiles
Symbol
I
GTP_DUAL tile transmitter termination supply current
MGTAVTTTX
I
GTP_DUAL tile shared PLL supply current
MGTAVCCPLL
I
GTP_DUAL tile resistor termination calibration supply current
MGTAVTTRXC
I
GTP_DUAL tile receiver termination supply current
MGTAVTTRX
I
GTP_DUAL tile internal analog supply current
MGTAVCC
MGTR
Precision reference resistor for internal calibration termination
REF
Notes:
1.
Typical values are specified at nominal voltage, 25°C, with a 3.2 Gb/s line rate.
2.
ICC numbers are given per GTP_DUAL tile with both GTP transceivers operating with default settings.
3.
AC coupled TX/RX link.
DS202 (v5.3) May 5, 2010
Product Specification
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
Description
(1)(2)
Description
= –40°C to +100°C.
J
Description
(2)
(3)
www.xilinx.com
Units
–0.5 to 1.32
V
–0.5 to 1.32
V
–0.5 to 1.32
V
–0.5 to 1.1
V
–0.5 to 1.32
V
Min
Max
Units
1.14
1.26
V
1.14
1.26
V
1.14
1.26
V
0.95
1.05
V
1.14
1.26
V
(1)
Min
Typ
Max
Units
71
90
mA
36
60
mA
0.1
0.5
mA
0.1
0.5
mA
56
110
mA
Ω
49.9 ± 1% tolerance
13

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