PI7C8152BMAE Pericom Semiconductor, PI7C8152BMAE Datasheet - Page 28

IC PCI-PCI BRIDGE 2PORT 160-MQFP

PI7C8152BMAE

Manufacturer Part Number
PI7C8152BMAE
Description
IC PCI-PCI BRIDGE 2PORT 160-MQFP
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI7C8152BMAE

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
160-MQFP, 160-PQFP
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Supply Current (max)
246 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Table 3-6 DEVICE NUMBER TO IDSEL S_AD PIN MAPPING
PI7C8152x performs a Type 1 to Type 0 translation when the Type 1 transaction
is generated on the primary bus and is intended for a device attached directly to the
secondary bus. PI7C8152x must convert the configuration command to a Type 0 format so
that the secondary bus device can respond to it. Type 1 to Type 0 translations are
performed only in the downstream direction; that is, PI7C8152x generates a Type 0
transaction only on the secondary bus, and never on the primary bus.
PI7C8152x responds to a Type 1 configuration transaction and translates it into a Type 0
transaction on the secondary when the following conditions are met during the address
phase:
!
!
!
When PI7C8152x translates the Type 1 transaction to a Type 0 transaction on
the secondary interface, it performs the following translations to the address:
!
!
!
!
PI7C8152x asserts a unique address line based on the device number. These address lines
may be used as secondary bus IDSEL signals. The mapping of the address lines depends on
the device number in the Type 1 address bits P_AD[15:11]. Table 3-6 presents the mapping
that PI7C8152x uses.
Device Number
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Ah
Bh
Ch
Dh
Eh
Fh
10h – 1Eh
1Fh
The lowest two address bits on P_AD[1:0] are 01b.
The bus number in address field P_AD[23:16] is equal to the value in the secondary
bus number register in configuration space.
The bus command on P_CBE[3:0] is a configuration read write transaction.
Sets the lowest two address bits on S_AD[1:0] to 0.
Decodes the device number and drives the bit pattern specified in Table 3-6 on
S_AD[31:16] for the purpose of asserting the device’s IDSEL signal.
Sets S_AD[15:11] to 0.
Leaves unchanged the function number and register number fields.
P_AD[15:11]
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000 – 11110
11111
Page 28 of 90
Secondary IDSEL S_AD[31:16]
0000 0000 0000 0001
0000 0000 0000 0010
0000 0000 0000 0100
0000 0000 0000 1000
0000 0000 0001 0000
0000 0000 0010 0000
0000 0000 0100 0000
0000 0000 1000 0000
0000 0001 0000 0000
0000 0010 0000 0000
0000 0100 0000 0000
0000 1000 0000 0000
0001 0000 0000 0000
0010 0000 0000 0000
0100 0000 0000 0000
1000 0000 0000 0000
0000 0000 0000 0000
Generate special cycle (P_AD[7:2] = 00h)
0000 0000 0000 0000 (P_AD[7:2] = 00h)
2-PORT PCI-TO-PCI BRIDGE
October 16, 2003 – Revision 1.11
ADVANCE INFORMATION
PI7C8152A & PI7C8152B
S_AD
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
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-

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