PI7C8152BMAE Pericom Semiconductor, PI7C8152BMAE Datasheet - Page 36

• Manufacturer Part Number: PI7C8152BMAE
• Description: IC PCI-PCI BRIDGE 2PORT 160-MQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8152BMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 160-MQFP, 160-PQFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 246 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.9.4.2
3.9.4.3
4
!
For posted write transactions:
!
!
!
TARGET DISCONNECT
PI7C8152x returns a target disconnect to an initiator when one of the following conditions
is met:
!
!
!
See Section 3.6.4 for a description of write address boundaries, and Section 3.7.3 for a
description of read address boundaries.
TARGET ABORT
PI7C8152x returns a target abort to an initiator when one of the following conditions is
met:
!
!
ADDRESS DECODING
PI7C8152x uses three address ranges that control I/O and memory transaction forwarding.
These address ranges are defined by base and limit address registers in the configuration
space. This chapter describes these address ranges, as well as ISA-mode and VGA-
addressing support.
Use more than 16 clocks to accept this transaction.
The posted write data buffer does not have enough space for address and at least one
DWORD of write data.
A locked sequence is being propagated across PI7C8152x, and the write transaction is
not a locked transaction.
When a target retry is returned to the initiator of a delayed transaction, the initiator
must repeat the transaction with the same address and bus command as well as the data
if it is a write transaction, within the time frame specified by the master timeout value.
Otherwise, the transaction is discarded from the buffers.
PI7C8152x hits an internal address boundary.
PI7C8152x cannot accept any more write data.
PI7C8152x has no more read data to deliver.
PI7C8152x is returning a target abort from the intended target.
When PI7C8152x returns a target abort to the initiator, it sets the signaled target abort
bit in the status register corresponding to the initiator interface.
Page 36 of 90
2-PORT PCI-TO-PCI BRIDGE
October 16, 2003 – Revision 1.11
ADVANCE INFORMATION
PI7C8152A & PI7C8152B