PI7C8152BMAE Pericom Semiconductor, PI7C8152BMAE Datasheet - Page 8

• Manufacturer Part Number: PI7C8152BMAE
• Description: IC PCI-PCI BRIDGE 2PORT 160-MQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8152BMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 160-MQFP, 160-PQFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 246 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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LIST OF TABLES
Table 2-1 PIN LIST – 160-PIN MQFP........................................................................................................ 16
Table 3-1 PCI TRANSACTIONS ................................................................................................................. 18
Table 3-2 WRITE TRANSACTION FORWARDING ................................................................................... 19
Table 3-3 WRITE TRANSACTION DISCONNECT ADDRESS BOUNDARIES.......................................... 22
Table 3-4 READ PREFETCH ADDRESS BOUNDARIES .......................................................................... 24
Table 3-5 READ TRANSACTION PREFETCHING.................................................................................... 24
Table 3-6 DEVICE NUMBER TO IDSEL S_AD PIN MAPPING ............................................................... 28
Table 3-7 DELAYED WRITE TARGET TERMINATION RESPONSE........................................................ 33
Table 3-8 RESPONSE TO POSTED WRITE TARGET TERMINATION .................................................... 33
Table 3-9 RESPONSE TO DELAYED READ TARGET TERMINATIOIN .................................................. 34
Table 5-1 SUMMARY OF TRANSACTION ORDERING ............................................................................ 44
Table 6-1 SETTING THE PRIMARY INTERFACE DETECTED PARITY ERROR BIT ............................. 52
Table 6-2 SETTING SECONDARY INTERFACE DETECTED PARITY ERROR BIT................................ 52
Table 6-3 SETTING PRIMARY BUS MASTER DATA PARITY ERROR DETECTED BIT......................... 53
Table 6-4 SETTING SECONDARY BUS MASTER DATA PARITY ERROR DETECTED BIT................... 54
Table 6-5 ASSERTION OF P_PERR_L....................................................................................................... 54
Table 6-6 ASSERTION OF S_PERR_L ....................................................................................................... 55
Table 6-7 ASSERTION OF P_SERR_L FOR DATA PARITY ERRORS...................................................... 55
Table 10-1 POWER MANAGEMENT TRANSITIONS ................................................................................ 64
LIST OF FIGURES
Figure 8-1 SECONDARY ARBITER EXAMPLE ......................................................................................... 61
Figure 14-1 PCI SIGNAL TIMING MEASUREMENT CONDITIONS ....................................................... 88
Figure 15-1 160-PIN MQFP PACKAGE OUTLINE................................................................................... 89
14.4
14.5
14.6
14.7
15.1
15.2
PACKAGE INFORMATION........................................................................................................ 89
66MHZ PCI SIGNALING TIMING............................................................................................. 88
33MHZ PCI SIGNALING TIMING............................................................................................. 88
RESET TIMING........................................................................................................................... 88
POWER CONSUMPTION........................................................................................................... 89
160-PIN MQFP PACKAGE DIAGRAM ..................................................................................... 89
PART NUMBER ORDERING INFORMATION ........................................................................ 89
Page 8 of 90
2-PORT PCI-TO-PCI BRIDGE
October 16, 2003 – Revision 1.11
ADVANCE INFORMATION
PI7C8152A & PI7C8152B