PI7C8152BMAE Pericom Semiconductor, PI7C8152BMAE Datasheet - Page 80

• Manufacturer Part Number: PI7C8152BMAE
• Description: IC PCI-PCI BRIDGE 2PORT 160-MQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8152BMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 160-MQFP, 160-PQFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 246 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.1.33
SECONDARY CLOCK CONTROL REGISTER – OFFSET 68h
Bit
4
5
6
7
Bit
1:0
3:2
5:4
Function
Master Abort On
Posted Write
Delayed Write
Non-Delivery
Delayed Read –
No Data From
Target
Reserved
Function
S_CLKOUT[0]
disable
Clock 1 disable
Clock 2 disable
Type
R/W
R/W
R/W
R/O
Type
R/W
R/W
R/W
Page 80 of 90
Description
Controls PI7C8152x’s ability to assert P_SERR_L when it receives a
master abort when attempting to deliver posted write data.
0: P_SERR_L is asserted if this event occurs and the SERR# enable
bit in the command register is set
1: P_SERR_L is not asserted if this event occurs
Reset to 0
Controls PI7C8152x’s ability to assert P_SERR# when it is unable to
transfer delayed write data after 2
0: P_SERR_L is asserted if this event occurs and the SERR_L enable
bit in the command register is set
1: P_SERR_L is not asserted if this event occurs
Reset to 0
Controls PI7C8152x’s ability to assert P_SERR_L when it is unable
to transfer any read data from the target after 2
0: P_SERR_L is asserted if this event occurs and the SERR_L enable
bit in the command register is set
1: P_SERR_L is not asserted if this event occurs
Reset to 0
Reserved. Returns 0 when read. Reset to 0
Description
S_CLKOUT[0] (slot 0) Enable
00: enable S_CLKOUT[0]
01: enable S_CLKOUT[0]
10: enable S_CLKOUT[0]
11: disable S_CLKOUT[0] and driven HIGH
Reset to 00
S_CLKOUT[1] (slot 1) Enable
00: enable S_CLKOUT[1]
01: enable S_CLKOUT[1]
10: enable S_CLKOUT[1]
11: disable S_CLKOUT[1] and driven HIGH
Reset to 00
S_CLKOUT[2] (slot 2) Enable
00: enable S_CLKOUT[2]
01: enable S_CLKOUT[2]
10: enable S_CLKOUT[2]
11: disable S_CLKOUT[2] and driven HIGH
Reset to 00
2-PORT PCI-TO-PCI BRIDGE
October 16, 2003 – Revision 1.11
ADVANCE INFORMATION
24
attempts.
PI7C8152A & PI7C8152B
24
attempts.