PI7C8152BMAE Pericom Semiconductor, PI7C8152BMAE Datasheet - Page 78

IC PCI-PCI BRIDGE 2PORT 160-MQFP

PI7C8152BMAE

Manufacturer Part Number
PI7C8152BMAE
Description
IC PCI-PCI BRIDGE 2PORT 160-MQFP
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI7C8152BMAE

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
160-MQFP, 160-PQFP
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Supply Current (max)
246 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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24
12.1.29
12.1.30
ARBITER CONTROL REGISTER – OFFSET 40h
EXTENDED CHIP CONTROL REGISTER – OFFSET 48h
Bit
24:16
25
31:26
Bit
0
1
3:2
4
15:5
Function
Arbiter Control
Priority of
Secondary
Interface
Reserved
Function
Memory Read
Flow Through
Enable
Park
Reserved
Memory Read
Data Buffer
Control
Reserved
Type
R/W
R/W
R/O
Type
R/W
R/W
R/W
R/W
R/O
Page 78 of 90
Description
Each bit controls whether a secondary bus master is assigned to the
high priority group or the low priority group.
Bits [19:16] correspond to request inputs S_REQ[3:0]
0: low priority
1: high priority
Reset to 0
Controls whether the secondary interface of the bridge is in the high
priority group or the low priority group.
0: low priority
1: high priority
Reset to 1
Reserved. Returns 0 when read. Reset to 0.
Description
Controls ability to do memory read flow through
0: Disable flow through during a memory read transaction
1: Enable flow through during a memory read transaction
Reset to 0
Controls bus arbiter’s park function
0: Park to last master
1: Park to the bridge – secondary port
Reset to 0
Reserved. Returns 0 when read. Reset to 0
Ability to control PI7C8152x’s behavior when the data buffer is
empty
0: start returning memory read data right away and inserts wait states
if the data buffer is empty
1: start returning memory read data after 1 cache line of data and
disconnects the master if the data buffer is empty
Reset to 0
Reserved. Returns 0 when read. Reset to 0
2-PORT PCI-TO-PCI BRIDGE
October 16, 2003 – Revision 1.11
ADVANCE INFORMATION
PI7C8152A & PI7C8152B

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