PI7C8152BMAE Pericom Semiconductor, PI7C8152BMAE Datasheet - Page 63

• Manufacturer Part Number: PI7C8152BMAE
• Description: IC PCI-PCI BRIDGE 2PORT 160-MQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8152BMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 160-MQFP, 160-PQFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 246 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9
9.1
9.2
9.3
If the internal secondary bus arbiter is enabled, the secondary bus is always parked at the
last master that used the PCI bus. That is, PI7C8152x keeps the secondary bus grant
asserted to a particular master until a new secondary bus request comes along. After reset,
PI7C8152x parks the secondary bus at itself until transactions start occurring on the
secondary bus. Offset 48h, bit 1, can be set to 1 to park the secondary bus at PI7C8152x.
By default, offset 48h, bit 1, is set to 0. If the internal arbiter is disabled, PI7C8152x parks
the secondary bus only when the reconfigured grant signal, S_REQ_L[0], is asserted and
the secondary bus is idle.
CLOCKS
This chapter provides information about the clocks.
PRIMARY CLOCK INPUT
PI7C8152x implements a primary clock input for the PCI interface. In synchronous mode,
the primary interface is synchronized to the primary clock input, P_CLK, and the
secondary interface is synchronized to the secondary clock. The secondary clock is derived
from the primary clock, and runs at the same frequency in synchronous mode. PI7C8152x
operates at a maximum frequency of 66 MHz.
SECONDARY CLOCK OUTPUTS
PI7C8152x has 5 secondary clock outputs, S_CLKOUT[4:0] that can be used as clock
inputs for up to four external secondary bus devices when PI7C8152x is in synchronous
mode. The S_CLKOUT[4:0] outputs are derived from P_CLK. The secondary clock edges
are delayed from P_CLK edges by a minimum of 0ns. For the PI7C8152B in asynchronous
mode, the S_CLKOUT[4:0] outputs cannot be used for external secondary bus devices.
These are the rules for using secondary clocks:
!
!
!
ASYNCHRONOUS MODE (PI7C8152B ONLY)
In asynchronous mode, the PI7C8152B can be run in the following frequency
configuration:
Each secondary clock output is limited to no more than one load.
One of the secondary clock outputs must be used for the S_CLKIN input (in
synchronous mode).
Each secondary clock output cannot be used for external secondary bus devices when
PI7C8152B is in asynchronous mode.
25MHz to 66MHz
Primary
Page 63 of 90
25MHz to 66MHz
2-PORT PCI-TO-PCI BRIDGE
October 16, 2003 – Revision 1.11
Secondary
ADVANCE INFORMATION
PI7C8152A & PI7C8152B