PI7C8152BMAE Pericom Semiconductor, PI7C8152BMAE Datasheet - Page 67

• Manufacturer Part Number: PI7C8152BMAE
• Description: IC PCI-PCI BRIDGE 2PORT 160-MQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8152BMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 160-MQFP, 160-PQFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 246 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.1
12.1.1
12.1.2
CONFIGURATION REGISTER
VENDOR ID REGISTER – OFFSET 00h
DEVICE ID REGISTER – OFFSET 00h
Bit
15:0
Bit
31:16
Secondary Bus Arbiter
Preemption Control
Secondary Latency
Reserved
Reserved
Reserved
Reserved
Prefetchable Memory Limit Address
Secondary Master Timeout Counter
Timer
31-24
Power Management Capabilities
Function
Vendor ID
Function
Device ID
I/O Limit Address Upper 16-bit
Memory Limit Address
Secondary Status
Arbiter Control
Primary Status
Bridge Control
Device ID
Reserved
Reserved
PPB Support Extensions
Prefetchable Memory Limit Address Upper 32-bit
Prefetchable Memory Base Address Upper 32-bit
P_SERR_L Status
Type
R/O
Type
R/O
Subordinate Bus
Header Type
Class Code
Reserved
Reserved
Number
23-16
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Description
Identifies Pericom as vendor of this device. Hardwired as 12D8h.
Description
Identifies this device as the PI7C8152. Hardwired as 8152h.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Primary Latency Timer
I/O Limit Address
Next Item Pointer
Secondary Bus
Interrupt Pin
Reserved
Prefetchable Memory Base Address
Reserved
Number
Primary Master Timeout Counter
15-8
I/O Base Address Upper 16-bit
Diagnostic / Chip Control
Secondary Clock Control
Power Management Data
Extended Chip Control
Memory Base Address
2-PORT PCI-TO-PCI BRIDGE
October 16, 2003 – Revision 1.11
ADVANCE INFORMATION
Port Option
Vendor ID
Command
PI7C8152A & PI7C8152B
Primary Bus Number
Capability Pointer to
I/O Base Address
P_SERR# Event
Cache Line Size
Capability ID
Revision ID
Reserved
Disable
DCh
7-0
84h – D8h
78h – 7Ch
DWORD
10h – 14h
50h – 60h
6Ch - 70h
Address
E4h-FFh
DCh
0Ch
1Ch
2Ch
3Ch
4Ch
E0h
00h
04h
08h
18h
20h
24h
28h
30h
34h
38h
40h
44h
48h
64h
68h
74h
80h