PI7C8152BMAE Pericom Semiconductor, PI7C8152BMAE Datasheet - Page 35

• Manufacturer Part Number: PI7C8152BMAE
• Description: IC PCI-PCI BRIDGE 2PORT 160-MQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8152BMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 160-MQFP, 160-PQFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 246 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.9.4
3.9.4.1
TARGET TERMINATION INITIATED BY PI7C8152x
PI7C8152x can return a target retry, target disconnect, or target abort to an initiator for
reasons other than detection of that condition at the target interface.
TARGET RETRY
PI7C8152x returns a target retry to the initiator when it cannot accept write data or return
read data as a result of internal conditions. PI7C8152x returns a target retry to an initiator
when any of the following conditions is met:
For delayed write transactions:
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For delayed read transactions:
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The transaction is being entered into the delayed transaction queue.
Transaction has already been entered into delayed transaction queue, but target
response has not yet been received.
Target response has been received but has not progressed to the head of the return
queue.
The delayed transaction queue is full, and the transaction cannot be queued.
A transaction with the same address and command has been queued.
A locked sequence is being propagated across PI7C8152x, and the write transaction is
not a locked transaction.
The target bus is locked and the write transaction is a locked transaction.
Use more than 16 clocks to accept this transaction.
The transaction is being entered into the delayed transaction queue.
The read request has already been queued, but read data is not yet available.
Data has been read from target, but it is not yet at the head of the read data queue if
offset 40h bit[11:0]=11 or a posted write transaction precedes it.
The delayed transaction queue is full, and the transaction cannot be queued.
A delayed read request with the same address and bus command has already been
queued.
A locked sequence is being propagated across PI7C8152x, and the read transaction is
not a locked transaction.
PI7C78152 is currently discarding previously pre-fetched read data.
The target bus is locked and the write transaction is a locked transaction.
Page 35 of 90
2-PORT PCI-TO-PCI BRIDGE
October 16, 2003 – Revision 1.11
ADVANCE INFORMATION
PI7C8152A & PI7C8152B