PI7C8152BMAE Pericom Semiconductor, PI7C8152BMAE Datasheet - Page 6

• Manufacturer Part Number: PI7C8152BMAE
• Description: IC PCI-PCI BRIDGE 2PORT 160-MQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8152BMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 160-MQFP, 160-PQFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 246 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5
6
7
8
9
10
11
12
4.4
5.1
5.2
5.3
5.4
6.1
6.2
6.3
6.4
7.1
7.2
7.3
8.1
8.2
9.1
9.2
9.3
9.4
11.1
11.2
11.3
12.1
4.4.1
4.4.2
TRANSACTION ORDERING.......................................................................................................... 42
ERROR HANDLING......................................................................................................................... 45
6.2.1
6.2.2
6.2.3
6.2.4
EXCLUSIVE ACCESS ...................................................................................................................... 57
7.2.1
7.2.2
PCI BUS ARBITRATION................................................................................................................. 60
8.2.1
8.2.2
8.2.3
8.2.4
CLOCKS ............................................................................................................................................. 63
12.1.1
12.1.2
12.1.3
12.1.4
PCI POWER MANAGEMENT .................................................................................................... 64
RESET............................................................................................................................................. 65
CONFIGURATION REGISTERS................................................................................................ 66
VGA SUPPORT ........................................................................................................................... 41
TRANSACTIONS GOVERNED BY ORDERING RULES ........................................................ 42
GENERAL ORDERING GUIDELINES...................................................................................... 43
ORDERING RULES .................................................................................................................... 44
DATA SYNCHRONIZATION .................................................................................................... 45
ADDRESS PARITY ERRORS .................................................................................................... 46
DATA PARITY ERRORS............................................................................................................ 47
DATA PARITY ERROR REPORTING SUMMARY ................................................................. 52
SYSTEM ERROR (SERR_L) REPORTING ............................................................................... 56
CONCURRENT LOCKS ............................................................................................................. 57
ACQUIRING EXCLUSIVE ACCESS ACROSS PI7C8152
ENDING EXCLUSIVE ACCESS ................................................................................................ 59
PRIMARY PCI BUS ARBITRATION......................................................................................... 60
SECONDARY PCI BUS ARBITRATION .................................................................................. 60
PRIMARY CLOCK INPUT ......................................................................................................... 63
SECONDARY CLOCK OUTPUTS............................................................................................. 63
ASYNCHRONOUS MODE (PI7C8152B ONLY)....................................................................... 63
SYNCHRONOUS MODE............................................................................................................ 64
PRIMARY INTERFACE RESET ................................................................................................ 65
SECONDARY INTERFACE RESET .......................................................................................... 65
CHIP RESET ................................................................................................................................ 66
CONFIGURATION REGISTER.................................................................................................. 67
VGA MODE......................................................................................................................... 41
VGA SNOOP MODE........................................................................................................... 42
CONFIGURATION WRITE TRANSACTIONS TO CONFIGURATION SPACE.......... 47
READ TRANSACTIONS .................................................................................................... 47
DELAYED WRITE TRANSACTIONS............................................................................... 48
POSTED WRITE TRANSACTIONS.................................................................................. 50
LOCKED TRANSACTIONS IN DOWNSTREAM DIRECTION ..................................... 57
LOCKED TRANSACTION IN UPSTREAM DIRECTION .............................................. 59
SECONDARY BUS ARBITRATION USING THE INTERNAL ARBITER.................... 60
PREEMPTION .................................................................................................................... 62
SECONDARY BUS ARBITRATION USING AN EXTERNAL ARBITER...................... 62
BUS PARKING.................................................................................................................... 62
VENDOR ID REGISTER – OFFSET 00h......................................................................... 67
DEVICE ID REGISTER – OFFSET 00h .......................................................................... 67
COMMAND REGISTER – OFFSET 04h.......................................................................... 68
PRIMARY STATUS REGISTER – OFFSET 04h ............................................................. 69
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2-PORT PCI-TO-PCI BRIDGE
October 16, 2003 – Revision 1.11
ADVANCE INFORMATION
PI7C8152A & PI7C8152B