LPC47M112_07 SMSC [SMSC Corporation], LPC47M112_07 Datasheet - Page 100

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LPC47M112_07

Manufacturer Part Number
LPC47M112_07
Description
Enhanced Super I/O Controller with LPC Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Enhanced Super I/O Controller with LPC Interface
Datasheet
to the pin within the part's power supply range. Most of the system interface pins are left active to monitor system
accesses that may wake up the part.
Note 1: Writing to the DOR or DSR does not wake up the part, however, writing any of the motor enable bits or doing a
System Interface Pins
Table 47 gives the state of the interface pins in the powerdown state. Pins unaffected by the powerdown are labeled
"Unchanged".
FDD Interface Pins
All pins in the FDD interface which can be connected directly to the floppy disk drive itself are either DISABLED or
TRISTATED.
Pins used for local logic control or part programming are unaffected. Table 48 depicts the state of the floppy disk drive
interface pins in the powerdown state.
SMSC DS – LPC47M112
software reset (via DOR or DSR reset bits) will wake up the part.
BASE + ADDRESS
Table 48 - State of Floppy Disk Drive Interface Pins in Powerdown
00H
01H
02H
03H
04H
06H
07H
07H
04H
05H
nWRTPRT
nDSKCHG
FDD PINS
nRDATA
nINDEX
nMTR0
SYSTEM PINS
nTRK0
Table 47 – State of System Pins in Auto Powerdown
nPCI_RESET
Access to these registers DOES NOT wake up the part
nDS0
nLFRAME
SER_IRQ
Table 46 - PC/AT and PS/2 Available Registers
PCI_CLK
nLPCPD
LAD[3:0]
nLDRQ
Access to these registers wakes up the part
DOR (1)
DSR (1)
PC-AT
CCR
MSR
Data
AVAILABLE REGISTERS
DIR
----
----
---
---
DATASHEET
OUTPUT PINS
INPUT PINS
STATE IN AUTO POWERDOWN
PS/2 (MODEL 30)
Page 100
DOR (1)
DSR (1)
MSR
STATE IN AUTO POWERDOWN
SRA
SRB
CCR
Data
DIR
Tristated
Tristated
---
---
Input
Input
Input
Input
Input
Unchanged
Unchanged
Unchanged
Unchanged
Unchanged
Unchanged
Unchanged
ACCESS PERMITTED
R/W
R/W
---
W
---
W
R
R
R
R
Rev. 02-16-07

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