LPC47M112_07 SMSC [SMSC Corporation], LPC47M112_07 Datasheet - Page 173

• Manufacturer Part Number: LPC47M112_07
• Description: Enhanced Super I/O Controller with LPC Interface
• Manufacturer: SMSC [SMSC Corporation]

Enhanced Super I/O Controller with LPC Interface
Datasheet
SMSC DS – LPC47M112
CLOCKI32
Default = 0x00
on VTR POR
MPU-401 Primary
Base I/O Address
High Byte
Default = 0x03
on HARD RESET,
SOFT RESET, VCC
POR and VTR POR
MPU-401 Primary
Base I/O Address
Low Byte
Default = 0x30
on HARD RESET,
SOFT RESET, VCC
POR and VTR POR
NAME
NAME
NAME
0xF1 - 0xFF
REG INDEX
REG INDEX
REG INDEX
Table 71 – MPU-401 [Logical Device Number = 0x0B]
0x60 R/W
0x61 R/W
(R/W)
0xF0
Table 70 - PME, Logical Device A
Bit[0] Reserved
Reserved - read as ‘0’
Bit[0] (CLK32_PRSN)
Bit[1] SPEKEY_EN. This bit is used to turn the logic
for the “wake on specific key” feature on and off. It will
disable the 32kHz clock input to the logic when turned
off. The logic will draw no power when disabled.
Bits[7:2] are reserved
Bit[0] A8
Bit[1] A9
Bit[2] A10
Bit[3] A11
Bit[4] “0”
Bit[5] “0”
Bit[6] “0”
Bit[7] “0”
Bit[0] “0”
Bit[1] A1
Bit[2] A2
Bit[3] A3
Bit[4] A4
Bit[5] A5
Bit[6] A6
Bit[7] A7
Note Bit[0] must be “0”.
DATASHEET
on (default)
0=32kHz clock is connected to the CLKI32
pin (default)
1=32kHz clock is not connected to the CLKI32
pin (pin is grounded)
0= “Wake on specific key” logic is
1= “Wake on specific key” logic is off
Page 173
DEFINITION
DEFINITION
DEFINITION
STATE
STATE
STATE
C
C
C
Rev. 02-16-07