LPC47M112_07 SMSC [SMSC Corporation], LPC47M112_07 Datasheet - Page 161

• Manufacturer Part Number: LPC47M112_07
• Description: Enhanced Super I/O Controller with LPC Interface
• Manufacturer: SMSC [SMSC Corporation]

Enhanced Super I/O Controller with LPC Interface
Datasheet
Chip Level (Global) Control/Configuration Registers[0x00-0x2F]
The chip-level (global) registers lie in the address range [0x00-0x2F]. The design MUST use all 8 bits of the ADDRESS
Port for register selection. All unimplemented registers and bits ignore writes and return zero when read.
The INDEX PORT is used to select a configuration register in the chip. The DATA PORT is then used to access the
selected register. These registers are accessible only in the Configuration Mode.
SMSC DS – LPC47M112
Config Control
Default = 0x00
on VCC POR,
VTR POR and
HARD RESET
Logical Device #
Default = 0x00
on VCC POR,
VTR POR,
SOFT RESET and
HARD RESET
Card Level Reserved 0x08 - 0x1F Reserved - Writes are ignored, reads return 0.
Device ID -
Hard wired
Default = 0x59
on VCC POR,
VTR POR,
SOFT RESET and
HARD RESET
Device Rev
Hard wired
= Current Revision
PowerControl
Default = 0x00
on VCC POR,
VTR POR,
SOFT RESET and
HARD RESET
REGISTER
0x03 - 0x06 Reserved - Writes are ignored, reads return 0.
ADDRESS
0x07 R/W
0x22 R/W
0x02 W
0x20 R
0x21 R
0x00 -
0x01
Table 61 - Chip Level Registers
Chip (Global) Control Registers
Reserved - Writes are ignored, reads return 0.
The hardware automatically clears this bit after the
write, there is no need for software to clear the bits.
Bit 0 = 1: Soft Reset. Refer to the "Configuration
Registers" table for the soft reset value for each
register.
A write to this register selects the current logical
device.
configuration registers for each logical device. Note:
The Activate command operates only on the selected
logical device.
Chip Level, SMSC Defined
A
identification. Bits[7:0] = 0x59 when read.
A read only register which provides device revision
information. Bits[7:0] = current revision when read.
Bit[0] FDC Power
Bit[1] Reserved
Bit[2] Game Port Power
Bit[3] Parallel Port Power
Bit[4] Serial Port 1 Power
Bit[5] Serial Port 2 Power (Note 2)
Bit[6] Serial Port 3 Power
Bit[7] Reserved
DATASHEET
read
This allows access to the control and
Page 161
only
register
DESCRIPTION
which
provides
device
STATE
C
C
C
C
C
Rev. 02-16-07