LPC47M112_07 SMSC [SMSC Corporation], LPC47M112_07 Datasheet - Page 185
LPC47M112_07
Manufacturer Part Number
LPC47M112_07
Description
Enhanced Super I/O Controller with LPC Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LPC47M112_07.pdf
(204 pages)
- Current page: 185 of 204
- Download datasheet (2Mb)
Enhanced Super I/O Controller with LPC Interface
Datasheet
Note 1: nWAIT is considered to have settled after it does not transition for a minimum of 50 ns.
Note 2: When not executing a write cycle, EPP nWRITE is inactive high.
SMSC DS – LPC47M112
ADDRSTB
NAME
DATASTB
PD<7:0>
t10
t11
t12
nWRITE
t1
t2
t3
t4
t5
t6
t7
t8
t9
nWAIT
nWAIT Asserted to nWRITE Deasserted
nWAIT Asserted to nWRITE Modified (Notes 1,2)
nWAIT Asserted to PDATA Hi-Z (Note 1)
Command Asserted to PDATA Valid
Command Deasserted to PDATA Hi-Z
nWAIT Asserted to PDATA Driven (Note 1)
PDATA Hi-Z to Command Asserted
nWRITE Deasserted to Command
nWAIT Asserted to Command Asserted
nWAIT Deasserted to Command Deasserted
(Note 1)
PDATA Valid to nWAIT Deasserted
PDATA Hi-Z to nWAIT Asserted
FIGURE 19 – EPP 1.9 DATA OR ADDRESS READ CYCLE
DESCRIPTION
t3
t1
DATASHEET
t9
t8
t7
Page 185
t4
t11
MIN
60
60
60
60
0
0
0
0
1
0
0
0
t10
TYP
t5
t12
MAX
185
190
180
190
195
180
30
t6
t2
UNITS
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
ns
ns
Rev. 02-16-07
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