LPC47M112_07 SMSC [SMSC Corporation], LPC47M112_07 Datasheet - Page 127

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LPC47M112_07

Manufacturer Part Number
LPC47M112_07
Description
Enhanced Super I/O Controller with LPC Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Enhanced Super I/O Controller with LPC Interface
Datasheet
The 2 MSBs of the count are sampled and a PME or SMI is generated (if enabled through the PME_EN1 enable
register or the SMI_EN5 enable register - see the “Runtime Registers” section) when these two bits are set. This
corresponds to a count value of 192.
The fan count is determined according to the following equation:
Term 1 in the equation above is determined by multiplying the clock source of 32.768kHz by 60sec/min and dividing
by the product of the revolutions per minute times the divisor. The default divisor, located in the Fan Control
Register, is 2. This results in a value for Term 1 in Equation 1 of 111 for a 4400 RPM.
The divisor for each fan is programmable via the Fan Control Register, Logical Device 8, 0xFA. The choices for the
divisor are 1, 2, 4 and 8. The default value is 2. The factor of ½ in Term 1 corresponds to two pulses per revolution.
The preload value is programmable via the FAN1 Preload Register and FAN2 Preload Register. The preload is the
initial value for the fan count which is used to adjust the count such that the value of 192 corresponds to the “lower
limit” of the RPM. By setting the preload value and divisor properly, the PME or SMI will be generated when the RPM
reaches the desired percentage of the nominal RPM to indicate a fan failure.
A PME or SMI is generated, if enabled through the PME or SMI enable register, at a count of 192, which corresponds
to the “upper limit” for the fan count. This value is made to correspond to the “lower limit” of the RPM for the fan by
programming the divisor and preload value accordingly. Typical practice is to consider 70% of normal RPM a fan
failure, at which point Term 1 in Equation 1 for the example above will be 160. Therefore, the preload value is
chosen to be 32 so that when the count reaches 192, this will correspond to 70% of the normal RPM for the
generation of a PME or SMI.
A representation of the logic for the fan tachometer implementation is shown below.
SMSC DS – LPC47M112
Count =
32 kHz
1
2
x
(Term 1)
RPM x Divisor
1.966 x 10
Programmable
1, 2, 4, 8
Divider
DATASHEET
6
+ Preload
Page 127
Latch on Read
Preload
Counter
MSB
(Equation 1)
Sync
To nPME
Logic
Rev. 02-16-07

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