LPC47M112_07 SMSC [SMSC Corporation], LPC47M112_07 Datasheet - Page 184
LPC47M112_07
Manufacturer Part Number
LPC47M112_07
Description
Enhanced Super I/O Controller with LPC Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LPC47M112_07.pdf
(204 pages)
- Current page: 184 of 204
- Download datasheet (2Mb)
Enhanced Super I/O Controller with LPC Interface
Datasheet
Note 1: nWAIT must be filtered to compensate for ringing on the parallel bus cable. WAIT is considered to have
SMSC DS – LPC47M112
nADDRSTB
nDATASTB
PD<7:0>
settled after it does not transition for a minimum of 50 nsec.
NAME
nWRITE
nWAIT
t1
t2
t3
t4
t5
t6
t7
t8
t9
nWAIT Asserted to nWRITE Asserted (Note 1)
nWAIT Asserted to nWRITE Change (Note 1)
nWAIT Asserted to PDATA Invalid (Note 1)
PDATA Valid to Command Asserted
nWRITE to Command Asserted
nWAIT Asserted to Command Asserted (Note 1)
nWAIT Deasserted to Command Deasserted
(Note 1)
Command Asserted to nWAIT Deasserted
Command Deasserted to nWAIT Asserted
FIGURE 18 – EPP 1.9 DATA OR ADDRESS WRITE CYCLE
t1
DESCRIPTION
t6
t5
t4
DATASHEET
Page 184
t8
MIN
60
60
10
60
60
0
5
0
0
t7
TYP
t9
MAX
210
185
185
190
35
10
t2
t3
UNITS
ns
ns
ns
ns
ns
ns
ns
μs
ns
Rev. 02-16-07
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