LPC47M112_07 SMSC [SMSC Corporation], LPC47M112_07 Datasheet - Page 71

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LPC47M112_07

Manufacturer Part Number
LPC47M112_07
Description
Enhanced Super I/O Controller with LPC Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Enhanced Super I/O Controller with LPC Interface
Datasheet
Note
Note
SMSC DS – LPC47M112
BAUD RATE
1
2
: The percentage error for all baud rates, except where indicated otherwise, is 0.2%.
DESIRED
: The High Speed bit is located in the Device Configuration Space.
115200
230400
460800
19200
38400
57600
1200
1800
2000
2400
3600
4800
7200
9600
300
600
GENERATE 16X CLOCK
DIVISOR USED TO
32770
32769
384
192
96
64
58
48
32
24
16
12
6
3
2
1
DATASHEET
BETWEEN DESIRED AND ACTUAL
PERCENT ERROR DIFFERENCE
Page 71
0.005
0.030
0.16
0.16
0.16
0.16
-
-
-
-
-
-
-
-
-
-
1
SPEED BIT
HIGH
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
2
Rev. 02-16-07

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