LPC47M112_07 SMSC [SMSC Corporation], LPC47M112_07 Datasheet - Page 165

• Manufacturer Part Number: LPC47M112_07
• Description: Enhanced Super I/O Controller with LPC Interface
• Manufacturer: SMSC [SMSC Corporation]

Enhanced Super I/O Controller with LPC Interface
Datasheet
Note 1: A logical device will be active and powered up according to the following equation:
Note 2: If the I/O Base Addr of the logical device is not within the Base I/O range as shown in the Logical Device I/O
Note 3: The default value of the Primary Interrupt Select register for logical device 0 is 0x06.
Note 4: The default value of the DMA Channel Select register for logical device 0 (FDD) is 0x02 and for logical
SMSC DS – LPC47M112
DEVICE ON (ACTIVE) = (Activate Bit SET or Pwr/Control Bit SET).
The Logical device's Activate Bit and its Pwr/Control Bit are linked such that setting or clearing one sets or
clears the other.
map, then read or write is not valid and is ignored.
device 3 and 5 is 0x04.
DATASHEET
Page 165
Rev. 02-16-07