LPC47M112_07 SMSC [SMSC Corporation], LPC47M112_07 Datasheet - Page 101

• Manufacturer Part Number: LPC47M112_07
• Description: Enhanced Super I/O Controller with LPC Interface
• Manufacturer: SMSC [SMSC Corporation]

Enhanced Super I/O Controller with LPC Interface
Datasheet
UART Power Management
Direct power management is controlled by CR22. Refer to CR22 for more information.
Auto Power Management is enabled by CR23-B4 and B5. When set, these bits allow the following auto power
management operations:
1.
2.
Note:
Exit Auto Powerdown
The transmitter exits powerdown on a write to the XMIT buffer. The receiver exits auto powerdown when RXDx
changes state.
Parallel Port
Direct power management is controlled by CR22. Refer to CR22 for more information.
Auto Power Management is enabled by CR23-B3. When set, this bit allows the ECP or EPP logical parallel port blocks
to be placed into powerdown when not being used.
The EPP logic is in powerdown under any of the following conditions:
1.
2.
The ECP logic is in powerdown under any of the following conditions:
1.
2
Exit Auto Powerdown
The parallel port logic can change powerdown modes when the ECP mode is changed through the ecr register or when
the parallel port mode is changed through the configuration registers.
Serial IRQ
The LPC47M112 supports the serial interrupt to transmit interrupt information to the host system. The serial
interrupt scheme adheres to the Serial IRQ Specification for PCI Systems, Version 6.0.
SMSC DS – LPC47M112
The transmitter enters auto powerdown when the transmit buffer and shift register are empty.
The receiver enters powerdown when the following conditions are all met:
A.
B.
EPP is not enabled in the configuration registers.
EPP is not selected through ecr while in ECP mode.
ECP is not enabled in the configuration registers.
SPP, PS/2 Parallel port or EPP mode is selected through ecr while in ECP mode.
Receive FIFO is empty
The receiver is waiting for a start bit.
While in powerdown the Ring Indicator interrupt is still valid and transitions when the RI input changes.
DRVDEN[0:1]
FDD PINS
nWDATA
nWGATE
nHDSEL
nSTEP
nDIR
DATASHEET
STATE IN AUTO POWERDOWN
Page 101
Tristated
Tristated
Active
Active
Active
Active
Rev. 02-16-07