LPC47M112_07 SMSC [SMSC Corporation], LPC47M112_07 Datasheet - Page 132

• Manufacturer Part Number: LPC47M112_07
• Description: Enhanced Super I/O Controller with LPC Interface
• Manufacturer: SMSC [SMSC Corporation]

Enhanced Super I/O Controller with LPC Interface
Datasheet
28 RUNTIME REGISTERS
The following registers are runtime registers in the LPC47M112. They are located at the address programmed in the
Base I/O Address in Logical Device A at the offset shown. These registers are powered by VTR.
SMSC DS – LPC47M112
REGISTER
OFFSET
(hex)
0A
0B
0C
0D
0E
1A
1B
1C
1D
1E
2A
00
01
02
03
04
05
06
07
08
09
0F
10
11
12
13
14
15
16
17
18
19
1F
20
21
22
23
24
25
26
27
28
29
R/W
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
Note 1
RESET
Table 57 - Runtime Register Block Summary
HARD
(Note 4)
0x01
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
DATASHEET
(Note 4)
POR
0x01
VCC
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Page 132
0x00
0x00
0x02
0x00
VTR POR
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
-
-
-
-
-
-
-
-
-
-
-
(Note 5)
(Note 5)
(Note 4)
(Note 5)
RESET
SOFT
(Note 4)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PME_STS
Reserved – reads return 0
Reserved – reads return 0
PME_STS1
PME_STS2
PME_STS3
PME_STS4
PME_STS5
Reserved – reads return 0
PME_EN1
PME_EN2
PME_EN3
PME_EN4
PME_EN5
Reserved – reads return 0
SMI_STS 1
SMI_STS 2
SMI_STS3
SMI_STS4
SMI_STS5
Reserved – reads return 0
SMI_EN1
SMI_EN2
SMI_EN3
SMI_EN4
SMI_EN5
Reserved – reads return 0
MSC_STS
Force Disk Change
Shadow
GP10
GP11
GP12
GP13
GP14
GP15
GP16
GP17
PME_EN
Reserved – reads return 0
Floppy
UART1 FIFO Control Shadow
UART2 FIFO Control Shadow
Device Disable Register
Data
REGISTER
Rate
Select
Rev. 02-16-07