LPC47M112_07 SMSC [SMSC Corporation], LPC47M112_07 Datasheet - Page 156

• Manufacturer Part Number: LPC47M112_07
• Description: Enhanced Super I/O Controller with LPC Interface
• Manufacturer: SMSC [SMSC Corporation]

Enhanced Super I/O Controller with LPC Interface
Datasheet
29 CONFIGURATION
The Configuration of the LPC47M112 is very flexible and is based on the configuration architecture implemented in
typical Plug-and-Play components. The LPC47M112 is designed for motherboard applications in which the resources
required by their components are known. With its flexible resource allocation architecture, the LPC47M112 allows the
BIOS to assign resources at POST.
SYSTEM ELEMENTS
Primary Configuration Address Decoder
After a hard reset (nPCI_RESET pin asserted) or Vcc Power On Reset the LPC47M112 is in the Run Mode with all
logical devices disabled. The logical devices may be configured through two standard Configuration I/O Ports (INDEX
and DATA) by placing the LPC47M112 into Configuration Mode.
The BIOS uses these configuration ports to initialize the logical devices at POST. The INDEX and DATA ports are only
valid when the LPC47M112 is in Configuration Mode.
The SYSOPT pin is latched on the falling edge of the nPCI_RESET or on Vcc Power On Reset to determine the
configuration register's base address. The SYSOPT pin is used to select the CONFIG PORT's I/O address at power-up.
Once powered up the configuration port base address can be changed through configuration registers CR26 and CR27.
The SYSOPT pin is a hardware configuration pin which is shared with the GP24 signal on pin 45.
Note. An external pull-down resistor is required for the base IO address to be 0x02E for configuration. An external
pull-up resistor is required to move the base IO address for configuration to 0x04E.
The INDEX and DATA ports are effective only when the chip is in the Configuration State.
Entering the Configuration State
The device enters the Configuration State when the following Config Key is successfully written to the CONFIG PORT.
Exiting the Configuration State
The device exits the Configuration State when the following Config Key is successfully written to the CONFIG PORT.
CONFIGURATION SEQUENCE
To program the configuration registers, the following sequence must be followed:
Enter Configuration Mode
To place the chip into the Configuration State the Config Key is sent to the chip's CONFIG PORT. The config key
consists of 0x55 written to the CONFIG PORT. Once the configuration key is received correctly the chip enters into the
Configuration State (The auto Config ports are enabled).
SMSC DS – LPC47M112
Note: The configuration port base address can be relocated through CR26 and CR27.
1) Enter Configuration Mode
2) Configure the Configuration Registers
3) Exit Configuration Mode.
CONFIG PORT (Note)
INDEX PORT (Note)
DATA PORT
PORT NAME
10k PULL-DOWN
DATASHEET
SYSOPT= 0
RESISTOR
Config Key = <0x55>
Config Key = <0xAA>
0x02E
0x02E
Page 156
INDEX PORT + 1
10K PULL-UP
SYSOPT= 1
RESISTOR
0x04E
0x04E
Read/Write
Read/Write
TYPE
Write
Rev. 02-16-07