XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 117

• Manufacturer Part Number: XC68HC705F32
• Description: MICROCONTROLLER
• Manufacturer: Motorola

11.11
The SCI system is configured and controlled by five registers: SCDAT, SCCR1, SCCR2, SCSR,
and BAUD.
11.11.1
The SCDAT is controlled by the internal R/W signal and performs two functions in the SCI. It acts
as the receive data register (RDR) when it is read and as the transmit data register (TDR) when it
is written.
provides the interface from the receive shift register to the internal data bus and the TDR provides
the parallel interface from the internal data bus to the transmit shift register.
The receive data register is a read-only register containing the last byte of data received from the
shift register for the internal data bus. The RDR full bit (RDRF) in the serial communications status
register is set to indicate that a byte has been transferred from the input serial shift register to the
SCDAT. The transfer is synchronized with the receiver bit rate clock (from the receiver control) as
shown in
The transmit data register (TDR) is a write-only register containing the next byte of data to be
applied to the transmit shift register from the internal data bus. As long as the transmitter is
enabled, data stored in the SCDAT is transferred to the transmit shift register (after the current byte
in the shift register has been transmitted).
The transfer is synchronized with the transmitter bit rate clock (from the transmitter control) as
shown in
11.11.2
The SCI control register 1 (SCCR1) contains control bits related to the nine data bit character
format and the receiver wake-up feature.
MC68HC05F32
SCI control 1 (SCCR1)
SCI data (SCDAT)
Figure
Figure
Figure 11-1
SCI registers
Serial communications data register (SCDAT)
Serial communications control register 1 (SCCR1)
11-1. All data is received with the least significant bit first.
11-1. All data is received with the least significant bit first.
shows this register as two separate registers, RDR and TDR. The RDR
SERIAL COMMUNICATIONS INTERFACE
Address
Address
$0047
$0048
bit 7
bit 7
R8
bit 6
bit 6
T8
bit 5
bit 5
0
M
bit 4
bit 4
WAKE
bit 3
bit 3
0
bit 2
bit 2
0
bit 1
bit 1
0
bit 0
bit 0
MOTOROLA
0000 0000
undefined
on reset
on reset
State
State
TPG
11-9
11