XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 128

• Manufacturer Part Number: XC68HC705F32
• Description: MICROCONTROLLER
• Manufacturer: Motorola

12
RA1, RA0 — PWM clock rate bits
These bits select the input clock rate and determine the period.
Note:
12.3.2
The PWM system has three 8-bit data registers which hold the duty cycle for each PWM output.
PWM data1, PWM data2, and PWM data3 are the data registers located at $41-$43 respectively.
Note:
12.4
The PWM continues normal operation during WAIT mode. To decrease power consumption during
WAIT, it is recommended that the rate select bits in the PWM control register are cleared if the
PWM D/A converter is not used.
MOTOROLA
12-4
PWM data1 (PWMD1)
PWM data2 (PWMD2)
PWM data3 (PWMD3)
The polarity bits and the PWM clock rate bits are not latched until the end of conversion.
They affect the PWM output immediately. For proper operation these control bits must
not be changed during conversion.
These registers are affected by RESET
PWM data registers (PWMD)
PWM during WAIT mode
Address
$0041
$0042
$0043
PULSE WIDTH MODULATOR
Table 12-1 PWM clock rate
RA1:RA0
0 0
0 1
1 0
1 1
bit 7
bit 6
PWM input clock
bit 5
OFF
E/2
E/4
E/8
bit 4
bit 3
bit 2
bit 1
MC68HC05F32
bit 0
1000 0000
1000 0000
1000 0000
on reset
State
TPG