XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 122

• Manufacturer Part Number: XC68HC705F32
• Description: MICROCONTROLLER
• Manufacturer: Motorola

NF — Noise error flag
This bit is set if there is noise on a ‘valid’ start bit, any of the data bits or on the stop bit. The NF bit
is not set by noise on the idle line nor by invalid start bits. If there is noise, the NF bit is not set until
the RDRF flag is set. Each data bit is sampled three times as described in
Section
11.8.
The NF bit represents the status of the byte in the serial communications data register. For the byte
being received (shifted in) there will be also a ‘working’ noise flag, the value of which will be
transferred to the NF bit when the serial data is loaded into the serial communications data
register. The NF bit does not generate an interrupt because the RDRF bit gets set with NF and can
be used to generate the interrupt.
The NF bit is cleared when the serial communications status register is accessed (with NF set)
followed by a read of the serial communications data register.
FE — Framing error flag
This bit is set when the word boundaries in the bit stream are not synchronized with the receiver
bit counter (generated by the reception of a logic zero bit where a stop bit was expected). The FE
bit reflects the status of the byte in the receive data register and the transfer from the receive shift
register to the receive data register is inhibited by an overrun. The FE bit is set during the same
cycle as the RDRF bit but does not get set in the case of an overrun (OR). The framing error flag
inhibits further transfer of data into the receive data register until it is cleared.
The FE bit is cleared when the serial communications status register is accessed (with FE set)
followed by a read of the serial communications data register.
11
11.11.5
Baud rate register (BAUD)
The baud rate register (BAUD) is used to set the bit rate for the SCI system. Normally this register
is written once, during initialization, to set the baud rate for SCI communications. Both the receiver
and the transmitter use the same baud rate which is derived from the MCU bus rate clock. A two
stage divider is used to develop custom baud rates from normal MCU crystal frequencies,
therefore it is not necessary to use special baud rate crystal frequencies.
State
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
on reset
SCI baud rate (BAUD)
$004B
TCLR
0
SCP1 SCP0 RCKB SCR2 SCR1 SCR0 0000 0uuu
TCLR — Clear baud rate counters (test purposes only)
This bit is disabled and remains low in any mode other than test or bootstrap. Reset clears this bit.
While in test or bootstrap mode, setting this bit causes the baud rate counter chains to be reset.
The logic one state of this bit is transitory, reads always a return a logic zero. This control bit is only
intended for factory testing of the MCU
TPG
MOTOROLA
SERIAL COMMUNICATIONS INTERFACE
MC68HC05F32
11-14