XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 29

• Manufacturer Part Number: XC68HC705F32
• Description: MICROCONTROLLER
• Manufacturer: Motorola

2.4
2.4.1
Power is supplied to the microcomputer via these two pins. VDD is the positive supply pin and VSS is
the ground pin.
It is in the nature of CMOS designs that very fast signal transitions occur on the MCU pins. These
short rise and fall times place very high short-duration current demands on the power supply. To
prevent noise problems, special care must be taken to provide good power supply bypassing at
the MCU. Bypass capacitors should have good high-frequency characteristics and be as close to
the MCU as possible. Bypassing requirements vary, depending on how heavily the MCU pins are
loaded.
2.4.2
This is an input-only pin for external interrupt sources. Interrupt triggering is selected using the
IRQ bit in the SOR register, to be one of two options: either edge and level sensitive or edge
sensitive only.
The IRQ pin contains an internal Schmitt trigger as part of its input to improve noise immunity.
2.4.3
This active low I/O pin is used to reset the MCU. Applying a logic zero to this pin forces the device
to a known start-up state. An external RC-circuit can be connected to this pin to generate a
power-on reset (POR) if required. In this case, the time constant must be great enough (at least
100ms) to allow the oscillator circuit to stabilise. This input has an internal Schmitt trigger to
improve noise immunity. When a low voltage reset condition occurs internally, the RESET pin
provides an active-low open drain output signal that may be used to reset external hardware.
Other internal reset conditions are not visible at the RESET pin.
2.4.4
These 16 I/O lines comprise the two 8-bit ports A and B. The state of any pin is software
programmable, and on reset, the port pins are configured as inputs, with internal pull-up resistors.
The eight I/O lines of port A are shared with the keyboard interrupt function.
MC68HC05F32
Pin descriptions
VDD and VSS
RESET
PA7–PA0/keyboard interrupt, PB7–PB0
IRQ
MODES OF OPERATION AND PIN DESCRIPTIONS
MOTOROLA
TPG
2-5
2