XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 97

• Manufacturer Part Number: XC68HC705F32
• Description: MICROCONTROLLER
• Manufacturer: Motorola

9.2.2
The A/D data register is a read-only register which is used to store the result of an A/D conversion.
The result is loaded into the register from the SAR and the conversion complete flag (COCO) in
the ADSCR register is set.
Caution: Performing a digital read of port D with levels other than V
9.3
The A/D converter continues to operate normally during WAIT mode. To decrease power
consumption during WAIT, it is recommended that both the ADON and ADRC bits in the ADSTAT
register are cleared, if the A/D converter is not being used. If the A/D converter is being used and
the system clock frequency is above 1MHz, the ADRC bit should be cleared to disable the internal
RC oscillator.
9.4
In STOP mode the comparator and charge pump are turned off and the A/D converter ceases to
operate. Any pending conversion is aborted. When the clock begins oscillation upon leaving the
STOP mode, a finite amount of time passes before the A/D circuits stabilize enough to provide
conversions to the specified accuracy. Normally, the delays built into the MC68HC05F32 are
sufficient for this purpose, therefore no explicit delays need to be built into the software.
9.5
The external analog voltage value to be processed by the A/D converter is sampled on an internal
capacitor through a resistive path, provided by input-selection switches and a sampling aperture
time switch, as shown in
the analog value is stored on the capacitor and held until the end of conversion. During this hold
time, the analog input is disconnected from the internal A/D system and the external voltage
source sees a high impedance input.
MC68HC05F32
A/D data register
result in greater power dissipation during the read cycles.
A/D result data register (ADDATA)
A/D converter during WAIT mode
A/D converter during STOP mode
A/D analog input
Figure
Address
$004E
9-2. Sampling time is limited to 12 bus clock cycles. After sampling,
bit 7
A/D CONVERTER
bit 6
bit 5
bit 4
bit 3
bit 2
DD
or V
bit 1
SS
on the pins will
bit 0
MOTOROLA
Undefined
on reset
State
TPG
9-5
9