XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 147
XC68HC705F32
Manufacturer Part Number
XC68HC705F32
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC705F32.pdf
(198 pages)
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15.3.3
In the direct addressing mode, the effective address of the argument is contained in a single byte
following the opcode byte. Direct addressing allows the user to directly address the lowest 256
bytes in memory with a single two-byte instruction.
MC68HC05F32
Branch if bit n is set
Branch if bit n is clear
Set bit n
Clear bit n
Function
Branch always
Branch never
Branch if higher
Branch if lower or same
Branch if carry clear
(Branch if higher or same)
Branch if carry set
(Branch if lower)
Branch if not equal
Branch if equal
Branch if half carry clear
Branch if half carry set
Branch if plus
Branch if minus
Branch if interrupt mask bit is clear
Branch if interrupt mask bit is set
Branch if interrupt line is low
Branch if interrupt line is high
Branch to subroutine
Direct
Address bus high
Function
BSET n (n=0–7)
BCLR n (n=0–7)
BRSET n (n=0–7)
BRCLR n (n=0–7)
Table 15-4 Bit manipulation instructions
CPU CORE AND INSTRUCTION SET
Mnemonic
Table 15-3 Branch instructions
EA = (PC+1); PC
0; Address bus low
Opcode # Bytes # Cycles Opcode # Bytes # Cycles
10+2•n
11+2•n
Mnemonic
(BHS)
BRA
BRN
(BLO)
BHCC
BHCS
BEQ
BSR
BLS
BCC
BNE
BCS
BPL
BMI
BMC
BMS
BHI
Bit set/clear
BIH
BIL
PC+2
2
2
Opcode # Bytes # Cycles
Relative addressing mode
Addressing modes
20
AD
21
27
2B
23
26
2A
22
24
24
25
25
28
29
2C
2D
2E
2F
5
5
(PC+1)
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
01+2•n
2
2
2•n
Bit test and branch
3
3
6
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
MOTOROLA
5
5
TPG
15-7
15
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