XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 45

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XC68HC705F32

Manufacturer Part Number
XC68HC705F32
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet

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4
PARALLEL INPUT/OUTPUT PORTS
The MC68HC05F32 has a total of 80 I/O lines, arranged as ten 8-bit ports. The I/O lines are
individually programmable as either input or output, under the software control of the data
direction registers. Port A can also be configured to respond to keyboard interrupts.
To avoid glitches on the output pins, data should be written to the I/O port data register before
writing ones to the corresponding data direction register bits to set the pins in output mode.
4.1
Input/output programming
The bidirectional port lines may be programmed as inputs or outputs under software control. The
direction of each pin is determined by the state of the corresponding bit in the port data direction
register (DDR). Each I/O port has an associated DDR. Any I/O port pin is configured as an output
if its corresponding DDR bit is set to a logic one. A pin is configured as an input if its corresponding
DDR bit is cleared.
At power-on or reset, all DDRs are cleared, thus configuring all port pins as inputs. The data
direction registers can be written to or read by the MCU. During the programmed output state, a
read of the data register actually reads the value of the output data latch and not the I/O pin. The
operation of the standard port hardware is shown schematically in
Figure
4-2.
This is further summarized in
Table
4-1, which shows the effect of reading from, or writing to an
I/O pin in various circumstances. Note that the read/write signal shown is internal and not available
to the user.
TPG
MC68HC05F32
PARALLEL INPUT/OUTPUT PORTS
MOTOROLA
4-1

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