XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 49

• Manufacturer Part Number: XC68HC705F32
• Description: MICROCONTROLLER
• Manufacturer: Motorola

4.4
Port C is an 8-bit bidirectional port, which is shared with the SPI subsystem, the SCI subsystem
and the timer system. If the SPI system is enabled, pins PC4–PC7 are connected to the functions
MISO, MOSI, SCK and SS, respectively. It the SCI system is enabled, pins PC2 and PC3 are
connected to RDI and TDO. PC0 and PC1 are connected to TCAP3 and TCAP4 in the timer
system. (These lines must be set to input, by resetting the DDR, to enable the correct TCAP
function).
Reset does not affect the data register, but it clears the data direction register, returning the ports
to inputs. Writing a 1 to a DDR bit, sets the corresponding port bit to output mode. All eight lines
have internal pull-ups, which can be programmed using the PUEN bit in the system option register
(SOR). The internal pull-ups are disabled after reset and when PUEN = 0, but are enabled by
writing a 1 to PUEN.
4.5
Port D is an 8-bit bidirectional port, which is shared with the A/D converter. A pin becomes
connected to the A/D converter, when its corresponding bit in the control register is set to 1.
Reset does not affect the data register, but it clears the data direction register and the control
register. The default setting of the register control bits is 0, making the pins general purpose I/O
lines. The direction of the pins is then determined by their corresponding bits in DDR (0 - input, 1
- output). Write access to DDR or the I/O register is blocked to reduce digital noise. Read access
to DDR or the I/O register returns 0. Port D has open-drain outputs, it therefore requires external
pull-up resistors for each pin when they are used as outputs.
Note:
MC68HC05F32
The maximum leakage current for I/O ports is 10 A. Thus, a high resistance from an
analog source can limit the accuracy of the A/D converter. The analog source should
therefore be less than 1 k .
R/W
0
0
1
1
Port C
Port D
DDRn
0
1
0
1
The I/O pin is in input mode. Data is written into the output data latch.
Data is written into the output data latch, and output to the I/O pin.
The state of the I/O pin is read.
The I/O pin is in output mode. The output data latch is read.
PARALLEL INPUT/OUTPUT PORTS
Table 4-1 I/O pin states
Action of MCU write to/read of data bit
MOTOROLA
TPG
4-5
4