XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 56

• Manufacturer Part Number: XC68HC705F32
• Description: MICROCONTROLLER
• Manufacturer: Motorola

5
RT1, RT0 — Real time interrupt rate select
These two bits select one of four taps from the real time interrupt circuitry. Reset sets both RT0
and RT1 to one, selecting the lowest periodic rate and therefore the maximum time in which to alter
them if necessary. The COP reset times are also determined by these two bits. Care should be
taken when altering RT0 and RT1 if a timeout is imminent, or the timeout period is uncertain. If the
selected tap is modified during a cycle in which the counter is switching, an RTIF could be missed
or an additional one could be generated. To avoid problems, the COP should be cleared before
changing the RTI taps. See
5.2.2
The core timer counter register is a read-only register, which contains the current value of the 8-bit
ripple counter at the beginning of the timer chain. Reset clears this register.
MOTOROLA
5-4
Core timer counter (CTCR)
Core timer counter register (CTCR)
RT1 RT0
0
0
1
1
0
1
0
1
Table 5-1
Address
Division
$0009
ratio
2
2
2
2
Table 5-1 Example RTI periods
14
15
16
17
16.384 kHz
bit 7
for some example RTI periods.
1 s
2 s
4 s
8 s
CORE TIMER
RTI Rates at f
bit 6
146.8 ms
293.6 ms
447 kHz
36.7 ms
73.4 ms
bit 5
OP
Frequency Specified
bit 4
146.8 ms
895 kHz
18.35 ms
36.7 ms
73.4 ms
bit 3
1.789 MHz
18.35 ms
9.17 ms
36.7 ms
73.4 ms
bit 2
bit 1
MC68HC05F32
bit 0
0000 0000
on reset
State
TPG