XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 126

• Manufacturer Part Number: XC68HC705F32
• Description: MICROCONTROLLER
• Manufacturer: Motorola

12
12.2
The PWM is capable of generating signals from 0% to 100% duty cycle. A $00 in the PWM data
register yields an ‘OFF’ output (0%), but an $FF yields a duty of 255/256. To achieve the 100%
duty (‘ON’ output), the polarity control bit is set to active low (POL = 0) for that channel (i.e. PWM0
and PWM1) while the data register has $00 in it.
When not in use, the PWM system can be shut off to save power by clearing the clock rate select
bits RA0 and RA1 in the PWM control register (PWCR). The PWM starts conversion immediately
after programming bits RA0 and RA1 in the PWM control register. The PWM outputs are
connected to port E if the corresponding bit in the port E control register is set.
The PWM output can have an active high or an active low pulse under software control.
12.3
There are three PWM data registers and a control register associated with the PWM system.
These registers can be written to and read at any time.
After reset the user should write to the data registers and to the polarity select bits prior to enabling
the PWM system (i.e. prior to setting RA1 and/or RA0 for PWM input clock rate). This will avoid an
erroneous duty cycle being driven.
MOTOROLA
12-2
$FF
$00
$01
$50
$80
T
Functional description
Registers
Figure 12-2 PWM output waveforms (POL = 1, active high)
PULSE WIDTH MODULATOR
256 T
255 T
255 T
176 T
128 T
MC68HC05F32
T
TPG