XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 124

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XC68HC705F32

Manufacturer Part Number
XC68HC705F32
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet

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11.12
The flexibility of the baud rate generator allows many different baud rates to be selected,
depending on the CPU clock frequency. A particular baud rate may be generated by manipulating
the various prescaler and division ratio bits.
The SCI baud rate can be calculated from the internal bus clock and the two prescaler factors,
PRS1 and PRS2. The first prescaler factor, PRS1, is selected with SCP0 and SCP1, as shown in
Table
shown in
by PRS1, divided by PRS2 (B = E/16/PRS1/PRS2).
Note:
11.13
When the MCU enters STOP mode, the baud rate generator driving the receiver and transmitter
is shut down. This stops all SCI activity. Both the receiver and the transmitter are unable to operate.
If the STOP instruction is executed during a transmitter transfer, that transfer is halted. When STOP
mode is exited as a result of an external interrupt, that particular transmission resumes.
If the receiver is receiving data when the STOP instruction is executed, received data sampling is
stopped (baud generator stops) and the rest of the data is lost.
Warning: For the above reasons, all SCI transactions should be in the idle state when the STOP
11.14
The SCI system is not affected by WAIT mode and continues normal operation. Any valid SCI
interrupt will wake-up the system. If required, the SCI system can be disabled prior to entering
WAIT mode by writing a zero to the transmitter and receiver enable bits in the serial communication
control register 2 at $0049. This action will result in a reduction of power consumption during WAIT
mode.
MOTOROLA
11-16
11-2. The second prescaler factor, PRS2, is selected with SCR0, SCR1 and SCR2, as
Table
For the receiver, the internal clock frequency is 16 times higher than the selected baud
rate.
instruction is executed.
Baud rate selection
SCI during STOP mode
SCI during WAIT mode
11-3. The SCI baud rate B equals the internal bus clock E, divided by 16, divided
SERIAL COMMUNICATIONS INTERFACE
MC68HC05F32
TPG

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