XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 17

• Manufacturer Part Number: XC68HC705F32
• Description: MICROCONTROLLER
• Manufacturer: Motorola

Figure
Number
MC68HC05F32
1-1
2-1
2-2
3-1
4-1
4-2
5-1
6-1
6-2
6-3
6-4
6-5
7-1
8-1
8-2
8-3
8-4
8-5
8-6
9-1
9-2
10-1
10-2
10-3
11-1
11-2
11-3
11-4
11-5
11-6
11-7
12-1
12-2
MC68HC05F32 block diagram ...........................................................................1–3
STOP and WAIT flowcharts ................................................................................2–3
Oscillator connections ........................................................................................2–9
Memory map of the MC68HC05F32 ..................................................................3–2
Structure of port with keyboard interrupt ............................................................4–3
Standard I/O port structure.................................................................................4–4
Core timer block diagram....................................................................................5–1
16-bit programmable timer block diagram ..........................................................6–2
Timer state timing diagram for reset .................................................................6–14
Timer state timing diagram for input capture ....................................................6–14
Timer state timing diagram for output compare ................................................6–15
Timer state timing diagram for timer overflow...................................................6–15
DTMF/melody generator (DMG) block diagram..................................................7–3
LCD system block diagram.................................................................................8–1
Voltage level selection ........................................................................................8–4
LCD waveform with 2 backplanes, 1/2 bias ........................................................8–5
LCD waveform with 2 backplanes, 1/3 bias ........................................................8–6
LCD waveform with 3 backplanes ......................................................................8–7
LCD waveform with 4 backplanes ......................................................................8–8
A/D converter block diagram ..............................................................................9–2
Electrical model of an A/D input pin....................................................................9–6
Data clock timing diagram ................................................................................10–3
Serial peripheral interface block diagram .........................................................10–5
Serial peripheral interface master–slave interconnection .................................10–6
Serial communications interface block diagram ...............................................11–2
SCI and port C..................................................................................................11–3
Data format.......................................................................................................11–5
SCI sampling technique used on all bits...........................................................11–6
SCI examples of start bit sampling technique ..................................................11–7
Artificial start following a framing error .............................................................11–8
SCI start bit following a break...........................................................................11–8
PWM block diagram..........................................................................................12–1
PWM output waveforms (POL = 1, active high)................................................12–2
LIST OF FIGURES
LIST OF FIGURES
TITLE
MOTOROLA
Number
Page
TPG
ix