XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 95

• Manufacturer Part Number: XC68HC705F32
• Description: MICROCONTROLLER
• Manufacturer: Motorola

9.2
9.2.1
COCO — Conversion complete flag
Each channel conversion takes 32 clock cycles at f
Reset clears the COCO flag.
ADRC — A/D RC oscillator control
If the MCU bus frequency is less than 1MHz, an internal RC oscillator must be used for the A/D
conversion clock. This selection is made by setting the ADRC bit in ADSCR. The ADRC bit allows
the user to control the A/D RC oscillator.
When the A/D RC oscillator is turned on, it takes a time t
this time A/D conversion results may be inaccurate.
MC68HC05F32
A/D status/control (ADSCR)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
A/D registers
A/D status/control register (ADSCR)
–
–
ADRC
0
0
1
1
COCO flag is set each time a conversion is complete, allowing the
new result to be read from the A/D result data register ($4E). The
converter then starts a new conversion.
COCO is cleared by reading the result data register or writing to the
status/control register.
The A/D RC oscillator is turned on and, if ADON is set, the A/D runs
from the internal RC oscillator clock (see
The A/D RC oscillator is turned off and, if ADON is set, the A/D runs
from the CPU clock.
ADON
Address
0
1
0
1
$004F COCO ADRC ADON
Table 9-1 A/D clock selection
oscillator
bit 7
OFF
OFF
ON
ON
RC
A/D CONVERTER
bit 6
converter
OFF
OFF
ON
ON
A/D
OP
bit 5
, where f
A/D switched off.
A/D using CPU clock.
Allows the RC oscillator to stabilize.
A/D using RC oscillator clock.
RCON
0
bit 4
OP
to stabilize (see
CH3
Comments
Table
is equal to or greater than 1MHz.
bit 3
CH2
9-1).
bit 2
CH1
bit 1
Table
CH0 0000 0000
16-5). During
bit 0
MOTOROLA
on reset
State
TPG
9-3
9