XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 144

no-image

XC68HC705F32

Manufacturer Part Number
XC68HC705F32
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC68HC705F32FU
Quantity:
110
15
15.2.1
Most of these instructions use two operands. The first operand is either the accumulator or the
index register. The second operand is obtained from memory using one of the addressing modes.
The jump unconditional (JMP) and jump to subroutine (JSR) instructions have no register
operand. Refer to
15.2.2
These instructions cause the program to branch if a particular condition is met; otherwise, no
operation is performed. Branch instructions are two-byte instructions. Refer to
15.2.3
The MCU can set or clear any writable bit that resides in the first 256 bytes of the memory space
(page 0). All port data and data direction registers, timer and serial interface registers,
control/status registers and a portion of the on-chip RAM reside in page 0. An additional feature
allows the software to test and branch on the state of any bit within these locations. The bit set, bit
clear, bit test and branch functions are all implemented with single instructions. For the test and
branch instructions, the value of the bit tested is also placed in the carry bit of the condition code
register. Refer to
15.2.4
These instructions read a memory location or a register, modify or test its contents, and write the
modified value back to memory or to the register. The test for negative or zero (TST) instruction is
an exception to this sequence of reading, modifying and writing, since it does not modify the value.
Refer to
15.2.5
These instructions are register reference instructions and are used to control processor operation
during program execution. Refer to
MOTOROLA
15-4
Table 15-5
Register/memory Instructions
Branch instructions
Bit manipulation instructions
Read/modify/write instructions
Control instructions
Table
Table 15-2
for a complete list of read/modify/write instructions.
15-4.
CPU CORE AND INSTRUCTION SET
for a complete list of register/memory instructions.
Table 15-6
for a complete list of control instructions.
Table
MC68HC05F32
15-3.
TPG

Related parts for XC68HC705F32