XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 73

• Manufacturer Part Number: XC68HC705F32
• Description: MICROCONTROLLER
• Manufacturer: Motorola

MC68HC05F32
Note:
Note:
1
flag and TCMP1,2
2
Compare register
timer clocks
timer clocks
Output compare
Output compare
processor clock
processor clock
Timer overflow
The CPU write to the compare registers may take place at any time, but a compare only occurs at timer state
T01. Thus a four cycle difference may exist between the write to the compare register and the actual compare.
The output compare flag is set at the timer state T11 that follows the comparison match ($F457 in this example).
Internal
Internal
The timer overflow flag is set at timer state T11 (transition of counter from $FFFF to $0000). It is cleared by
a read of the timer status register during the internal processor clock high time, followed by a read of the
counter low register.
Internal
counter
register
Internal
counter
Figure 6-4 Timer state timing diagram for output compare
16-bit
16-bit
latch
Figure 6-5 Timer state timing diagram for timer overflow
flag
T00
T01
T10
T11
T00
T01
T10
T11
16-BIT PROGRAMMABLE TIMER
CPU writes $F457
$FFFF
$F456
(Note 1)
(Note 1)
(Note 2)
$F457
$0000
$F458
$0001
$F457
$F459
$0002
MOTOROLA
TPG
6-15
6