XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 133

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XC68HC705F32

Manufacturer Part Number
XC68HC705F32
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet

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14.1
The MC68HC05F32 can be reset in five ways: by the initial power-on reset function, by an active
low input to the RESET pin, by an on-chip low voltage reset, by an opcode fetch from an illegal
address, and by a COP watchdog timer reset. Any of these resets will cause the program to return
to its starting address, specified by the contents of memory locations $FFFE and $FFFF, and
cause the interrupt mask of the CCR to be set.
14.1.1
A power-on reset occurs when a positive transition is detected on VDD. The power-on reset
function is strictly for power turn-on conditions and should not be used to detect drops in the power
supply voltage. The power-on circuitry provides a stabilization delay (t
oscillator becomes active. If the external RESET pin is low at the end of this delay then the
processor remains in the reset state until RESET goes high.
14.1.2
When the oscillator is running in a stable state, the MCU is reset when a logic zero is applied to
the RESET input for a minimum period of 1.5 machine cycles (t
Schmitt trigger as part of its input to improve noise immunity. When the reset pin goes high, the
MCU will resume operation on the following cycle. The RESET pin is also an output device for the
internal low voltage reset.
14.1.3
When an opcode fetch occurs from an address which is not part of the RAM ($0068 – $03FF) or
of the ROM ($8000 – $FFFF) or EEPROM ($0400 – $04FF), the device is automatically reset.
MC68HC05F32
Resets
Power-on reset
RESET pin
Illegal address reset
RESETS AND INTERRUPTS
RESETS AND INTERRUPTS
14
CYC
). This pin contains an internal
PORL
) from when the
MOTOROLA
TPG
14-1
14

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