MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 348

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
7.3.2.30
Read: Anytime
Write: Anytime.
All bits reset to one.
A full access for the counter register will take place in one clock cycle.
If the RDMCL bit in MCCTL register is cleared, reads of the MCCNT register will return the present value
of the count register. If the RDMCL bit is set, reads of the MCCNT will return the contents of the load
register.
If a 0x0000 is written into MCCNT when LATQ and BUFEN in ICSYS register are set, the input capture
and pulse accumulator registers will be latched.
With a 0x0000 write to the MCCNT, the modulus counter will stay at zero and does not set the MCZF flag
in MCFLG register.
If the modulus down counter is enabled (MCEN = 1) and modulus mode is enabled (MODMC = 1), a write
to MCCNT will update the load register with the value written to it. The count register will not be updated
with the new value until the next counter underflow.
If modulus mode is not enabled (MODMC = 0), a write to MCCNT will clear the modulus prescaler and
will immediately update the counter register with the value written to it and down-counts to 0x0000 and
stops.
The FLMC bit in MCCTL can be used to immediately update the count register with the new value if an
immediate load is desired.
348
Reset
Reset
W
W
R
R
MCCNT15
MCCNT7
Modulus Down-Counter Count Register (MCCNT)
15
1
1
7
A separate read/write for high byte and low byte will give different results
than accessing them as a word.
Figure 7-55. Modulus Down-Counter Count Register High (MCCNT)
Figure 7-56. Modulus Down-Counter Count Register Low (MCCNT)
MCCNT14
MCCNT6
14
1
1
6
MCCNT13
MCCNT5
MC9S12XDP512 Data Sheet, Rev. 2.21
13
1
1
5
MCCNT12
MCCNT4
NOTE
12
1
1
4
MCCNT11
MCCNT3
11
1
1
3
MCCNT10
MCCNT2
10
1
1
2
MCCNT9
MCCNT1
Freescale Semiconductor
1
1
9
1
MCCNT8
MCCNT9
1
1
8
0