MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 417

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
Dummy Read
From IBDR
Switch To
Rx Mode
Y
Byte To IBDR
(Master Rx)
Transmitted
Addr Cycle
Last Byte
Write Next
RXAK=0
End Of
?
?
?
Y
N
N
TX
Stop Signal
Generate
Y
N
Figure 9-12. Flow-Chart of Typical IIC Interrupt Routine
Tx/Rx
Set TXAK =1
?
Y
Byte To Be Read
Byte To Be Read
MC9S12XDP512 Data Sheet, Rev. 2.21
From IBDR
Read Data
And Store
2nd Last
RX
Last
?
?
N
N
Stop Signal
Generate
Y
Y
RTI
Master
Mode
Clear
IBIF
?
Chapter 9 Inter-Integrated Circuit (IICV2) Block Description
Write Data
To IBDR
(Read)
Set TX
Mode
N
N
Y
Dummy Read
From IBDR
Clear IBAL
IAAS=1
Set RX
SRW=1
Mode
Y
?
?
N
Address Transfer
(Write)
Tx Next
Byte
Y
Y
Y
Dummy Read
From IBDR
Arbitration
ACK From
Switch To
Receiver
IAAS=1
Rx Mode
TX/RX
Lost
?
?
?
?
N
N
N
TX
Data Transfer
From IBDR
Read Data
And Store
RX
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