MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1283
MPC562MZP56
Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC562MZP56
Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
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Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
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F.20.2
Note: All delays are in system clock periods.
Freescale Semiconductor
1
2
3
MMCSM input pin period
MMCSM pin low time
MMCSM pin high time
clock pin to counter bus increment.
load pin to new counter bus value
clock pin to PINC delay
Load pin to PINL delay
Counter bus resolution
Counter bus overflow reload to interrupt flag
MCPSM enable to counter bus increment.
MMCSM Enable to counter bus increment
(MIN)
MMCSM Enable to counter bus increment
(MAX)
Minimum output resolution depends on MMCSM and MCPSM prescaler settings.
Maximum resolution is obtained by setting CPSMPSL[3:0] =0x2 and MMCSMSCR_CP[7:0] =0xFF.
The exact timing from MMCSM enable to the pin being set depends on the timing of the MMCSMSCR register write
and the MCPSM VS_PCLK. The MMCSM enable is taken to mean the MMCSMSCR_CLS[1:0] being written to
2‘b11.
3
3
MMCSM Timing Characteristics
MMCSM pin
Figure F-52. MMCSM Minimum Input Pin (Either Load Or Clock) Timing Diagram
f
SYS
Characteristic
f
SYS
is the internal system clock for the IMB3 bus.
Table F-25. MMCSM Timing Characteristics
MPC561/MPC563 Reference Manual, Rev. 1.2
t
PPER
min
Symbol
t
t
t
t
t
t
t
CBFLG
NOTE
t
MCMP
MCME
MCME
PCCB
t
t
PPER
t
PLCB
t
PINC
PINL
PLO
CBR
PHI
t
PLO
min
(256 - MMCSMSCR_CP) * MCPSMSCR_PSL + 2
4 + MCPSMSCR_PSL*
(255 - MMCSMSCR_CP)
4 + MCPSMSCR_PSL * (255 - MMCSMSCR_CP)
+ (MCPSMSCR_PSL - 1)
Min
—
4
2
2
1
1
1
1
1
t
min
PHI
1
3
3
Electrical Characteristics
Max
2
—
—
—
2
2
2
2
2
F-67
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