MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 867
MPC562MZP56
Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC562MZP56
Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
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Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
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21.2
The UC3F EEPROM module consists of a control register block, an addressable shadow row implemented
in Flash, and an addressable main Flash memory array. The control registers are used to configure,
program, erase and exercise the UC3F shadow row and Flash array.
21.2.1
These supervisor-level control registers are used to control UC3F EEPROM module operation. On reset,
the registers are loaded with default reset information. Several bits of the UC3F control registers are
special Flash NVM registers which retain their state when power is removed from the UC3F EEPROM.
These special NVM registers are identified in the individual register field and control bit descriptions.
21.2.1.1
The UC3F module control registers, shown in
generated from the BIU. As such, each Flash module that is designed using the UC3F EEPROM module
may uniquely define the addressing of the control register block.
21.2.1.2
The UC3F module configuration register is used to configure the operation and access restrictions of the
UC3F array and shadow row.
Freescale Semiconductor
HRESET
HRESET
Field STOP LOCK
Field
Addr
Programming Model
UC3F EEPROM Control Registers
1
Register Addressing
UC3F EEPROM Configuration Register (UC3FMCR)
MSB
Reset state determined by NVM registers. These bits will be set to 01 by the factory.
16
0
0
0
17
Figure 21-2. UC3F EEPROM Configuration Register (UC3FMCR)
1
0
1
0x2F C80C
0x2F C800
0x2F C804
0x2F C808
Address
—
18
0
0
2
Table 21-2. UC3F Register Programming Model
MPC561/MPC563 Reference Manual, Rev. 1.2
FIC
19
0
0
3
DATA
SIE
20
0
0
4
ACCESS CENSOR
Table
21
0
0
5
Module Configuration (UC3FMCR)
Extended Module Configuration (UC3FMCRE)
High Voltage Control (UC3FCTL)
Reserved
0x2F C800
21-2, are selected with individual register selects
1
22
0
6
1
1
23
0
7
1
24
1
1
8
25
1
1
9
Register
10
26
1
1
PROTECT
11
27
1
1
SUPV
CDR3 Flash (UC3F) EEPROM
12
28
1
1
13
29
1
1
14
30
1
1
LSB
15
31
1
1
21-5
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