MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 607
MPC562MZP56
Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC562MZP56
Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
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Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
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14.6
The QADC64E requires accurate, noise-free input signals for proper operation. This section discusses the
design of external circuitry to maximize QADC64E performance.
The QADC64E uses the external signals shown in
be used as general-purpose digital input/output signals. With external multiplexing MPC561/MPC563 can
support 41 analog inputs. In addition, there are three analog reference signals and two analog submodule
power signals, shared by each QADC64E module.
14.6.1
The sixteen port signals can be used as analog inputs, or as a bidirectional 16-bit digital input/output port.
Port A signals are referred to as PQA[7:0] when used as a bidirectional 8-bit digital input/output port.
These eight signals may be used for general-purpose digital input signals or push-pull digital output
signals. Port B signals are referred to as PQB[7:0] and operate the same as Port A.
Port A and B signals are connected to a digital input synchronizer during reads and may be used as general
purpose digital inputs when the applied voltages meet high voltage input (V
requirements. Refer to
requirements.
Freescale Semiconductor
Trig1
(gate)
EOC
QS
CWPQ1
Q1 RES
CF1
TOR1
CWP
QADC64E Integration Requirements
Port Digital Input/Output Signals
LAST
0
Appendix F, “Electrical
LAST
CCW0
XX
Figure 14-46. Gated Mode, Continuous Scan Timing
8
MPC561/MPC563 Reference Manual, Rev. 1.2
CCW0
CCW1
R0
CCW1
R1
CCW2
Characteristics,” for more information on voltage
Figure
CCW3
CCW2
R2
14-1. There are 16 channel signals that can also
Q restart
CCW3
CCW0
R3
IH
QADC64E Enhanced Mode Operation
) and low voltage input (V
CCW2
CCW3
R2
Q restart
CCW3
CCW0
R3
14-65
IL
)
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