UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 245

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Cautions 1. Before overwriting the TCLn register with different data, stop the timer operation.
Remark
(b) Timer clock selection registers 4 and 5 (TCL4 and TCL5)
2. TI4 and TI5 are used alternately as P03/INTP3 and P04/INTP4, respectively, so when using
When TCL4 and TCL5 are connected in cascade, the TCL5 register settings are invalid.
(n = 4, 5)
the TIn pin function, set the PMC03 or PMC04 bit of the PMC0 register to 1 before starting
timer operation. Edge detection may not be correctly performed if the bit is manipulated
after the timer starts operating.
After reset: 00H
TCLn
TCLn2
0
7
0
0
0
0
1
1
1
1
CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 2 TO 5
R/W
TCLn1
0
6
0
0
1
1
0
0
1
1
Address: TCL4 FFFFF654H, TCL5 FFFFF655H
TCLn0
User’s Manual U15905EJ2V1UD
0
1
0
1
0
1
0
1
5
0
Falling edge of TIn
Rising edge of TIn
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
/4
/8
/16
/32
/128
/256
4
0
Clock
Count clock selection
0
3
200 ns
400 ns
800 ns
1.6 s
6.4 s
12.8 s
TCLn2
20 MHz
µ
µ
µ
2
−
−
TCLn1
f
XX
1
400 ns
800 ns
1.6 s
3.2 s
12.8 s
25.6 s
10 MHz
µ
µ
µ
µ
−
−
TCLn0
0
243