UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 319

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• Read ASIFn register (confirm that TXBFn bit = 0)
• Write data (m)
• Read ASIFn register (confirm that TXSFn bit = 1)
• Read ASIFn register (confirm that TXSFn bit = 0)
• Clear (0) the UARTCAEn bit or TXEn bit
(TXBFn, TXSFn bits)
There is no write data
INTSTn (output)
UARTCAEn bit
(b) Ending procedure
ASIFn register
TXDn (output)
TXBn register
TXSn register
The procedure for ending continuous transmission is shown below.
TXEn bit
Transmission End Procedure
or
<6>
Data (m − 1)
11
CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE n (UARTn)
<7>
01
Figure 13-7. Continuous Transmission End Procedure
Start
Data (m − 1)
bit
User’s Manual U15905EJ2V1UD
<8>
11
Data (m − 1)
<6> Transmission of data (m − 2) is in
<7> INTSTn interrupt occurs
<8> Generate start bit
<9> INTSTn interrupt occurs
<10> Generate start bit
<11> Generate INTSTn interrupt
Initialize internal circuits
progress
Start data (m − 1) transmission
Start data (m) transmission
<<Transmission in progress>>
<<Transmission in progress>>
Internal Operation
<9>
Stop
Data (m)
bit
Start
bit
<10>
Data (m)
01
Data (m)
TXBFn
ASIFn Register
1
0
0
1
0
0
0
0
<11>
Stop
bit
00
TXSFn
FFH
1
1
1
1
1
1
0
0
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