UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 275

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3) Watchdog timer mode register (WDTM)
Notes 1. Once the RUN bit is set (to 1), it cannot be cleared (to 0) by software.
This register sets the watchdog timer operation mode and enables/disables count operations.
This register is a special register that can be written only in a special sequence (refer to 3.4.8 Special
registers).
The WDTM register can be read or written in 8-bit or 1-bit units.
This register is cleared to 00H after reset.
2. Once the WDTM3 and WDTM4 bits are set (to 1), they cannot be cleared (to 0) by software and can
Therefore, when counting is started, it cannot be stopped except by reset (RESET input or watchdog
timer overflow).
be cleared only by reset.
WDTM
After reset:
WDTM4
RUN
00H
RUN
< >
0
1
0
0
1
1
Stops counting
Clears counter and starts counting
WDTM3
CHAPTER 10 WATCHDOG TIMER FUNCTIONS
R/W
0
1
0
1
0
Address:
Interval timer mode
(Upon overflow, maskable interrupt INTWDTM is generated.)
Watchdog timer mode 1
(Upon overflow, non-maskable interrupt INTWDT is generated.)
Watchdog timer mode 2
(Upon overflow, reset operation WDTRES is started.)
User’s Manual U15905EJ2V1UD
Selection of watchdog timer operation mode
0
Selection of watchdog timer operation mode
FFFFF6C2H
WDTM4
WDTM3
0
Note 1
0
Note 2
0
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