UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 404

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

402
Note To cancel slave wait, write FFH to IIC or set WREL.
Processing by master device
Transfer lines
WREL
INTIIC
WREL
INTIIC
ACKD
MSTS
Processing by slave device
ACKD
MSTS
WTIM
ACKE
WTIM
ACKE
STD
SPD
TRC
SDA
STD
SPD
TRC
STT
SPT
SCL
STT
SPT
IIC
IIC
Start condition
L
H
H
H
H
H
L
L
L
L
L
Receive
IIC
(When 9-Clock Wait Is Selected for Both Master and Slave) (1/3)
←
AD6 AD5 AD4 AD3 AD2 AD1 AD0
Transmit
1
Figure 15-19. Example of Master to Slave Communication
address
2
3
4
(a) Start condition ~ address
User’s Manual U15905EJ2V1UD
CHAPTER 15 I
5
(When EXC = 1)
6
7
W
2
8
C BUS
ACK
9
IIC
D7
1
←
IIC
Note
data
D6
←
2
FFH
D5
3
Note
D4
4