UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 321

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(5) Reception error
Cautions 1. Be sure to read receive buffer register n (RXBn) even when a reception error occurs. If
INTSRn (output)
The three types of errors that can occur during a receive operation are a parity error, framing error, and
overrun error. As a result of data reception, the various flags of the ASISn register are set (1), and a reception
error interrupt (INTSREn) or a reception completion interrupt (INTSRn) is generated at the same time. The
ISRMn bit of the ASIMn register specifies whether INTSREn or INTSRn is generated.
The type of error that occurred during reception can be detected by reading the contents of the ASISn register
during the INTSREn or INTSRn interrupt servicing.
The contents of the ASISn register are reset (0) by reading the ASISn register.
RXBn register
RXDn (input)
2. Reception is always performed assuming a stop bit length of 1.
Figure 13-8. Asynchronous Serial Interface Reception Completion Interrupt Timing
PEn
FEn
OVEn
Error Flag
RXBn is not read, an overrun error will occur at the next data reception and the reception
error status will continue infinitely.
A second stop bit is ignored.
CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE n (UARTn)
Parity error
Framing error
Overrun error
Reception Error
Start
Table 13-2. Reception Error Causes
D0
User’s Manual U15905EJ2V1UD
The parity specification during transmission did not match
the parity of the reception data
No stop bit was detected
The reception of the next data was completed before data
was read from receive buffer register n (RXBn)
D1
D2
Cause
D6
D7
Parity Stop
319