UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 448

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

446
(1) External interrupt rising edge specification register 0 (INTR0)
(2) External interrupt falling edge specification register 0 (INTF0)
Remark
Remark
This is an 8-bit register that specifies detection of the rising edge of the NMI and INTP0 to INTP4 pins.
This register can be read or written in 8-bit or 1-bit units.
This register is cleared to 00H after reset.
Caution When the function is changed from the external interrupt function (alternate function) to the
This is an 8-bit register that specifies detection of the falling edge of the NMI and INTP0 to INTP4 pins.
This register can be read or written in 8-bit or 1-bit units.
This register is cleared to 00H after reset.
Caution When the function is changed from the external interrupt function (alternate function) to the
Remark
INTF0n
For how to specify a valid edge, refer to Table 17-3.
For how to specify a valid edge, refer to Table 17-3.
INTR0
0
0
1
1
INTF0
After reset:
After reset:
port function, an edge may be detected. Therefore, clear INTF0n and INTR0n to 0, and then
set the port mode.
port function, an edge may be detected. Therefore, clear INTF0n and INTR0n to 0, and then
set the port mode.
n = 0: Control of NMI pin
n = 1 to 5: Control of INTP0 to INTP4 pins
CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
00H
00H
INTR0n
0
0
0
1
0
1
R/W
R/W
0
0
Table 17-3. Valid Edge Specification
No edge detected
Rising edge
Falling edge
Both edges
Address:
Address:
INTR05
INTF05
User’s Manual U15905EJ2V1UD
INTP4
INTP4
FFFFFC20H
FFFFFC00H
INTR04
INTF04
INTP3
INTP3
Valid Edge Specification (n = 0 to 5)
INTR03
INTF03
INTP2
INTP2
INTR02
INTF02
INTP1
INTP1
INTR01
INTF01
INTP0
INTP0
INTR00
INTF00
NMI
NMI